Dr. Zahid Ullah is currently serving as Assistant Professor & Head of the Department of Electrical & Computer Engineering, Pak-Austria Fachhochschule: Institute of Applied Sciences and Technology, Haripur, Pakistan. He has previously served as Associate Professor & Chairman with the Department of Electrical Engineering, CECOS University of IT & Emerging Sciences, Peshawar, Pakistan. He got more than 12 years of experience in teaching and research while working in different places which include, in addition to above, City University of Hong Kong (CityU Architecture Lab for Arithmetic and Security), Hanyang University, South Korea (Reliable and High-speed Computing Lab), FAST National University of Computer & Emerging Sciences, Peshawar, Pakistan, Peshawar College of Engineering, Peshawar, Pakistan, and University of Engineering & Technology, Mardan, Pakistan.
His research interests include low power/high speed CAM design on FPGA, re-configurable computing, pattern recognition, embedded systems, and image processing. He has more than 40 Journal and Conference papers and has got 3 patents on his name in the field of FPGA-based TCAMs. Further, two US patents are under review. He has supervised more than 15 MS students, one PhD student, and is currently supervising two PhD students. He is a reviewer of many prestigious journals such as IEEE Transactions on Very Large-Scale Integration Systems, IEEE Transactions on Circuits and Systems I, IEEE Access, and Springer Circuits, Systems, and Signal Processing. He was awarded scholarship for MS studies in Hanyang University, South Korea by Higher Education Commission Pakistan, and for PhD studies by City University of Hong Kong. He has experience in Outcome-based Education system (OBE) of the Washington Accord. He also received two times best researcher award (CECOS University, Pakistan), two times Outstanding Academic Performance Award, two times Research Tuition Fee Scholarship, and two times Conference Grant (City University Hong Kong).